Phase 3D GPS Receiver

This page and all referenced images are Copyright 1995 by AMSAT.
All text is by N3EUA, who accepts sole responsibility for any inaccuracies.

For Historical Value, Only!

Overview

The Phase 3D GPS Experiment is primarily intended to demonstrate our ability to determine the orbital position, and three-axis attitude of the spacecraft by analysis of the radio signals emanating from the constellation of GPS satellites. There are several secondary experiments planned, the most interesting of which is our intent to map the (unpublished) antenna patterns of the GPS satellites outside their orbits, since Phase 3D's orbit will take us high above the GPS constellation at apogee.

The unusual requirements placed on a GPS receiver in the orbital environment dictate the need to develop a custom receiver. In our case, a full custom receiver based on the GPS front-end chipset from GEC Plessey is at the heart of our effort. More detail on the design of this receiver is available in a paper by N3EUA in the proceedings of the 1995 AMSAT Annual Meeting, available from the AMSAT office.

The GPS module will contain two main circuit boards, one hosting the CPU, memory, and satellite interfaces... the second hosting the Plessey correlator chips, oscillators, and related circuits. In addition, there will be 7 small daughter cards for the correlator board each holding a Plessey L-band downconverter/digitizer, and an additional daughter card holding power regulation and switching circuits. There will be 7 antennas mounted on the satellite, 4 on the "top" and 3 on the "bottom", each with an associated preamp.

Communication with the GPS Experiment will take place via the Rudak-U subsystem, using HDLC and CAN bus interfaces on the GPS receiver.

Integration Effort

These images of the Phase 3D spacecraft's GPS receiver were taken by N3EUA during the initial integration of the GPS CPU board and the GPS RF/Correlator board in Black Forest, CO, USA, on 14 December 1995.

The individuals involved in the integration effort included N3EUA, KD9KX, WA1UVP, and WD0FHG.

These images were taken with a Sony camcorder, Snappy video digitizer, and are in 75% quality 24-bit JPEG format, 640x480 pixels.

• [52k jpg] The two main boards just after power-up, with no smoke!
• [69k jpg] The RF / Correlator board
• [43k jpg] Ron Luse, KD9KX, hacking "between the fax machine and the 9-track drive"
• [44k jpg] Doug Varney, WA1UVP, testing the RF board

• [48k jpg] The CPU board, 10VDC power supply, meter, and a SIMM that tested bad.
• [46k jpg] A closer shot of the CPU and meter, with the bad SIMM in the upper right.