[Date Prev][Date Next][Thread Prev][Thread Next] - [Date Index][Thread Index][Author Index]

Re: Re:"hard reset"

>On Mon, Dec 18, 2000 at 08:13:16PM -0000, John Stephensen, KD6OZH wrote:
>> The AO-40 IHU most likely works like others that I have seen. A "hard reset"
>> will reset the CPU and all peripherals and reboot the system. The AO-40 IHU
>> has error-correcting memory so one of the first things that must be done
>> after reset is to write zeros into memory. This is because the memory will
>> start up full of random bits and half of the bit combinations are guaranteed
>> to activate the error correction hardware and interrupt the CPU
>IMO, the memory would only return to random bits if the devices
>were actually powered down and up again. At least in the case of
>static RAM, anyway (which in my experience does not typically
>have a reset signal). I suppose this could occur if the controller
>for dynamic memory missed a few refresh cycles during a reset though.
>Does AO40's IHU-1 use DRAM?

According to the P3D site, if my aging memory serves, the IHU's use
radiation-hard processors and rad-hard CMOS static RAM, which does require
power to retain contents but does not require refresh.  As long as the SRAM
has power, it will retain its data .. in my experience SRAM will hold its
data without power for a surprisingly long time as well, although with
progressively more bit errors with longer power dropouts ..

                 --... ...--  -.. .  -. ..... ...- -...
             Bruce Bostwick  N5VB  Austin, TX  Grid EM10DH
    ARRL / UT ARC / Austin ARC / Travis Co. ARES / W5YI Vol. Examiner
   http://ccwf.cc.utexas.edu/~lihan/  mailto:lihan@ccwf.cc.utexas.edu

Via the amsat-bb mailing list at AMSAT.ORG courtesy of AMSAT-NA.
To unsubscribe, send "unsubscribe amsat-bb" to Majordomo@amsat.org